关键词: FasterNet, PCB缺陷检测, BiFPN, 内存访问, YOLOv7, 多尺度特征融合

Abstract: A PCB defect detection method based on an improved version of YOLOv7 has been proposed to address the issues of inaccurate detection， slow detection speed， and low recognition accuracy in traditional network models. Firstly， this method replaces CatConv with partial convolution PConv from FasterNet in the original YOLOv7 model to reduce memory access and parameter quantity， thereby improving detection speed. Secondly， a bidirectional feature pyramid network （BiFPN） is introduced into the head network of the YOLOv7 model to achieve multi-scale feature fusion for PCB defect detection， enhancing the model’s detection accuracy. The FasterNet module is then fused with BiFPN to form the YOLOv7+FasterNet+BiFPN model for PCB defect detection， enhancing the model's capability to express defect features. Finally， the original CIoU loss function is improved to XIoU loss function， which not only improve the convergence speed of the model and its resistance to perturbations on small bounding boxes， but it also accurately measures the accuracy and localization precision of the bounding box predictions. The experimental results show that the improved YOLOv7 model achieves an mAP@0.5 of 95.7% and a recall rate of 98.0% on the test set. Compared to the original YOLOv7 model， the mAP@0.5 value and recall rate have increased by 7 and 2 percentage points， respectively. The detection time is only 21.7 ms. Additionally， the computational complexity of FLOPs has also decreased by 6.5 G compared to the original model. The proposed method outperforms traditional network models in terms of detection speed， recall rate， and accuracy， providing an effective solution for PCB defect detection.

Key words: FasterNet, PCB defect detection, BiFPN, memory access, YOLOv7, multi-scale feature fusion