计算机与现代化 ›› 2012, Vol. 1 ›› Issue (6): 89-94,9.doi: 10.3969/j.issn.1006-2475.2012.06.025

• 网络与通信 • 上一篇    下一篇

基于FPGA的数字下变频SDR-PHS系统的设计及实现

赵 亮   

  1. 荣信电力电子股份有限公司,辽宁 鞍山 114051
  • 收稿日期:2012-05-07 修回日期:1900-01-01 出版日期:2012-06-14 发布日期:2012-06-14

Design and Realization of Digital Down-conversion SDR-PHS System Based on FPGA

ZHAO Liang   

  1. Rongxin Power Electronic Co., Ltd., Anshan 114051, China
  • Received:2012-05-07 Revised:1900-01-01 Online:2012-06-14 Published:2012-06-14

摘要: 软件无线电SDR(Software Defined Radio)技术改变了传统的硬件无线电平台,是一种具有弹性的软件无线电平台,它支持不同的无线通信标准和系统的要求。而现场可编程门阵列FPGA(Field Programmable Gate Array)由于其可灵活编程的特点,其处理能力、逻辑资源规模的不断增强,在需要灵活配制的SDR设计中承担着越来越重要的角色。本文从软件无线电的设计思想出发,描述一种应用于个人手持式电话系统PHS(Personal Handyphone System)中基于FPGA的数字下变频SDR处理方案的设计分析及其实现过程,阐述基于硬限幅和RSSI幅度信息恢复的低成本SDR实现方法。仿真试验结果验证了该方法的有效性和可靠性。

关键词: 软件无线电, FPGA, 硬约束

Abstract: The software defined radio (SDR) technology has changed traditional hardware radio platform, which is a flexible software defined radio platform and supports different wireless communication standards and system requirements. The field programmable gate array (FPGA) plays an increasingly important role in flexible SDR design due to its flexible programming features, increasing processing capacity and scale of logical resources. Starting from the design idea of software defined radio, this paper describes the design and realization of a digital down-conversion SDR system based on FPGA used in personal handyphone system (PHS), and elaborates a kind of low cost SDR realization based on hard limit and RSSI amplitude restore. Simulation results verify the validity and reliability of this method.

Key words: SDR, FPGA, hard restriction

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