Abstract: Due to the rapid increase of computational complexity and memory requirement in the field of object detection in remote sensing images, it is quite difficult to be applied to the embedded platform with small size and low power. To address aforementioned issues, a hardware and software co-acceleration framework based on field-programmable gate array (FPGA) to promote the inference process of object detection in remote sensing images is proposed. Firstly, the trained YOLOv3 network are compressed and compiled according to the Vitis AI acceleration scheme. And then, the underlying hardware project including deep learning processing unit (DPU) module is built on FPGA, and the DPU task scheduler is written on ARM. Finally, the inference acceleration based on FPGA is implemented on Zynq SoC development platform. Experimental results show that our framework achieves an average throughput rate of 1.75 TOPS (26.8 fps) on the Xilinx Zynq MPSoC, and the mean Average Precision (mAP) on DIOR dataset is 56.7%.

Key words: remote sensing images, object detection, convolutional neural network, field programmable gate array