Computer and Modernization ›› 2010, Vol. 1 ›› Issue (8): 47-51.doi: 10.3969/j.issn.1006-2475.2010.08.014
• 操作系统 • Previous Articles Next Articles
LI Xiang-dong1, HU Huai-wei2, HAO Lu-jun1, YAN Xin-fen1
Received:
Revised:
Online:
Published:
Abstract: The FPGA based on the SOPC is one of the last technologies in electronic design fields. Custom IP core is the important embodiment of the SOPC system flexibility, and is most important in the design of the SOPC system. This paper describes the design of custom IP core and the design flow using SOPC Builder, taking EP1C6Q240C8 for example that belongs to Cyclone series made by ALtera Co. On the condition of Quartus II8.0, the hardware of sevenLED is designed by Verilog language. On the condition of NiosⅡIDE, the API to access and control the hardware equipment is developed by C language.
Key words: NiosⅡ, custom IP core, Avalon bus, device driver
LI Xiang-dong;HU Huai-wei;HAO Lu-jun;YAN Xin-fen. Design of Custom IP Core in SOPC Based on FPGA[J]. Computer and Modernization, 2010, 1(8): 47-51.
0 / / Recommend
Add to citation manager EndNote|Ris|BibTeX
URL: http://www.c-a-m.org.cn/EN/10.3969/j.issn.1006-2475.2010.08.014
http://www.c-a-m.org.cn/EN/Y2010/V1/I8/47