Computer and Modernization ›› 2010, Vol. 1 ›› Issue (3): 39-4.doi: 10.3969/j.issn.1006-2475.2010.03.011

• 网络与通信 • Previous Articles     Next Articles

Hop-Fault-Tolerant Algorithm in Mesh

LI Wang-yuan,WANG Chang-shan   

  1. School of Computer, Xidian University, Xi’an 710071, China
  • Received:2009-08-07 Revised:1900-01-01 Online:2010-03-20 Published:2010-03-20

Abstract:

With the improvement of chip integration, network on chip(NoC) which is based on the system on chip (SoC) has already become the importance of the chip design. With the increase of the intellectual property (IP) core, the fault in node and links is significantly increased, so making the use of faulttolerant in order to enhance the reliability of the system becomes the focus on the design of NOC. Based on the traditional faulttolerant technology and the 2DMesh topology, this paper proposes a hopfaulttolerant algorithm based on the turn model and then does performance comparison with OPNET.

Key words: network on chip(NoC), faulttolerant, Mesh, hopfaulttolerant