Computer and Modernization ›› 2010, Vol. 1 ›› Issue (3): 39-4.doi: 10.3969/j.issn.1006-2475.2010.03.011
• 网络与通信 • Previous Articles Next Articles
LI Wang-yuan,WANG Chang-shan
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Abstract:
With the improvement of chip integration, network on chip(NoC) which is based on the system on chip (SoC) has already become the importance of the chip design. With the increase of the intellectual property (IP) core, the fault in node and links is significantly increased, so making the use of faulttolerant in order to enhance the reliability of the system becomes the focus on the design of NOC. Based on the traditional faulttolerant technology and the 2DMesh topology, this paper proposes a hopfaulttolerant algorithm based on the turn model and then does performance comparison with OPNET.
Key words: network on chip(NoC), faulttolerant, Mesh, hopfaulttolerant
LI Wang-yuan;WANG Chang-shan. Hop-Fault-Tolerant Algorithm in Mesh[J]. Computer and Modernization, 2010, 1(3): 39-4.
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URL: http://www.c-a-m.org.cn/EN/10.3969/j.issn.1006-2475.2010.03.011
http://www.c-a-m.org.cn/EN/Y2010/V1/I3/39
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