Verilog Design of Integer DCT and Quantization Module in  H.264/AVC

doi:10.3969/j.issn.1006-2475.2013.02.026

Computer and Modernization ›› 2013, Vol. 1 ›› Issue (2): 108-112+.doi: 10.3969/j.issn.1006-2475.2013.02.026

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Verilog Design of Integer DCT and Quantization Module in H.264/AVC

SHEN Jing-tong， ZHANG Wei

College of Information Science and Technology, Jinan University, Guangzhou 510632, China

Received:2012-10-29 Revised:1900-01-01 Online:2013-02-27 Published:2013-02-27

Abstract

Abstract: The video compression standard H.264/AVC uses 4×4 integer DCT and quantization methods, which avoid data mismatch and improve data accuracy, thus has high compression efficiency. This paper analyzes the algorithm of integer DCT and quantization in H.264. By transforming DCT into two quick butterfly computations, it reduces algorithm complexity and makes it easer to realize. The synthesis and simulation by QuartusII show the correct results. The design is of 54.54MHz high clock frequency, low resource usage and low power dissipation.
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Key words: H.264/AVC, integer DCT, quantization, Verilog HDL

SHEN Jing-tong;ZHANG Wei. Verilog Design of Integer DCT and Quantization Module in H.264/AVC[J]. Computer and Modernization, 2013, 1(2): 108-112+.

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Verilog Design of Integer DCT and Quantization Module in H.264/AVC

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